Receiver

ABSTRACT

A receiver capable of reducing a low-frequency noise generated when a component is integrally formed on a semiconductor substrate by using CMOS process or MOS process. A high-frequency amplifier circuit  11,  a mixing circuit  12 , a local oscillator  13,  intermediate-frequency filters  14  and  16,  an intermediate-frequency amplifier circuit  15,  a limit circuit  17,  an FM detection circuit  18,  and a stereo demodulation circuit  19  constituting an FM receiver are formed as a one-chip component  10.  This one-chip component  10  is formed on a semiconductor substrate by using the CMOS process or the MOS process. The amplification elements contained in the mixing circuit  12,  the intermediate-frequency filters  14  and  16,  the intermediate-frequency amplifier circuit  15,  and the local oscillator  13  are formed by using the p-channel type FET.

TECHNICAL FIELD

The present invention relates to a receiver for providing frequencyconversion of a received modulated wave signal.

BACKGROUND ART

A general receiver adopting a super-heterodyne method converts afrequency by using a mixing circuit after amplifying a modulated wavesignal received via an antenna at a high frequency, and demodulates itafter converting it into an intermediate-frequency signal having apredetermined frequency.

Particularly, in recent years, a research is underway as to a technologyfor integrally forming an analog circuit including a high-frequencycomponent on a semiconductor substrate by using CMOS process or MOSprocess, which is put to practical use in certain apparatuses. It ispossible, by forming various kinds of circuits on one chip by using theCMOS process or the MOS process, to miniaturize and reduce cost of theentire apparatus. Therefore, it is thinkable that the range of theapparatuses to be formed on one chip will expand from now on.

To form the components of a receiver in the past adopting asuper-heterodyne method on one chip by using the CMOS process or the MOSprocess, there is a problem that low-frequency noise called 1/f noiseincreases. In general, compared to a bipolar transistor, a MOS-type FETis characterized by having high 1/f noise. And if the componentsconstituting the receiver are formed on one chip by using the CMOSprocess or the MOS process, an FET as an amplification element includedtherein becomes a source of the 1/f noise. Moreover, in the case ofconverting a modulated wave signal of a high frequency into anintermediate-frequency signal of a low frequency by using a mixingcircuit, a ratio of the 1/f noise component in theintermediate-frequency signal becomes higher, resulting in deteriorationof receiving quality due to decline in an SN ratio.

DISCLOSURE OF THE INVENTION

The present invention was created in view of these points, and an objectthereof is to provide a receiver capable of reducing low-frequency noisegenerated in the case of performing integral formation on asemiconductor substrate by using CMOS process or MOS process.

To solve the above-mentioned problem, a receiver according to thepresent invention has a high-frequency amplifier circuit, a localoscillator, a mixing circuit, an intermediate-frequency amplifiercircuit and an intermediate-frequency filter. The high-frequencyamplifier circuit amplifies a modulated wave signal received via anantenna. The local oscillator generates a predetermined localoscillation signal. The mixing circuit mixes and outputs the modulatedwave signal amplified by the high-frequency amplifier circuit and thelocal oscillation signal outputted from the local oscillator. Theintermediate-frequency amplifier circuit amplifies anintermediate-frequency signal outputted from the mixing circuit. Theintermediate-frequency filter selectively outputs theintermediate-frequency signals. And at least the mixing circuit,intermediate-frequency amplifier circuit, intermediate-frequency filterand local oscillator are integrally formed on the semiconductorsubstrate by using the CMOS process or the MOS process, andamplification elements included therein are formed by using a p-channeltype FET. 1/f noise itself can be reduced by using the p-channel typeFETs of which mobility is low as the amplification elements. Therefore,it is possible, in the case where at least the mixing circuit,intermediate-frequency amplifier circuit, intermediate-frequency filterand local oscillator are integrally formed on the semiconductorsubstrate by using the CMOS process or the MOS process, to reduce thelow-frequency noise generated therein.

It is desirable that the above-mentioned intermediate-frequency filterextracts a difference component between the modulated wave signal andthe local oscillation signal as the intermediate-frequency signal. Inthe case of using the difference component, the frequency of theintermediate-frequency signal after frequency conversion is lower thanthat of the modulated wave signal, and so influence of the 1/f noise ofthe amplification elements formed byusing the CMOS process or the MOSprocess becomes conspicuous. Therefore, in such cases, the amplificationelements to be the source of the noise are formed by the p-channel typeFET so as to have a greater effect of noise reduction.

It is also desirable that the above-mentioned difference between thefrequency of the local oscillation signal and a carrier frequency of themodulated wave signal is smaller than an occupied frequency bandwidth ofthe modulated wave signal. In particular, in the case where thefrequencies of the modulated wave signal and the local oscillationsignal are set as described above, an area close to a DC component isused as a signal band so that the influence of the 1/f noise becomesmost significant. Therefore, in such cases, the effect of noisereduction becomes most significant by forming the amplification elementsas the source of the noise with the p-channel type FET.

The above-mentioned mixing circuit, intermediate-frequency amplifiercircuit and intermediate-frequency filter are cascade-connected. Whenpaying attention to the FETs multi-connected as the amplificationelements included therein, it is desirable to set a gate length L and agate width W of the FETs placed in preceding stages at values largerthan the gate length L and gate width W of the FETs placed in subsequentstages thereto. It is generally known that the 1/f noise generated inthe FETs becomes higher in proportion to each reciprocal of the gatelength L and gate width W. Therefore, it is possible, by setting thegate length L and gate width W at large values, to reduce the 1/f noisegenerated in the FETs. Especially, considering the FETs multi-connectedas the amplification elements, it is desirable to reduce the 1/f noisegenerated in the FETs included in the preceding stages for the sake ofreducing overall low-frequency noise because it is amplified in the FETsplaced in subsequent stages thereto. And it is thinkable that, as the1/f noise generated in the FETs included in the subsequent stages isamplified to a lesser extent in further subsequent stages thereto, itcontributes little to reduction in the overall low-frequency noise.Therefore, it is possible, by setting the gate length L and gate width Wincluded in the subsequent stages at values smaller than those of theFETs in preceding stages thereto, to reduce the area required by theFETs so as to reduce the cost by miniaturization of the chips.

As the above-mentioned mixing circuit, intermediate-frequency amplifiercircuit and intermediate-frequency filter are cascade-connected, it isdesirable, by paying attention to the multi-connected FETs at arbitrarypositions as the amplification elements included therein, to set thegate length L and gate width W of each FET so that the noise componentgenerated by the FET becomes smaller than that included in an inputsignal. It is possible, by rendering the noise component generated byany FET smaller than that included in the input signal of that FET, toreduce the overall low-frequency noise.

It is also desirable that the above-mentioned semiconductor substratehas an N-well formed thereon, and the components including at least themixing circuit, intermediate-frequency amplifier circuit,intermediate-frequency filter and local oscillator are formed on theN-well. It is possible, by forming these components on the N-well, toprevent a noise current from running via a pn joint surface formedbetween the N-well and the semiconductor substrate beneath it so as toprevent the noise generated in a circuit on the N-well from sneaking onanother component through the semiconductor substrate.

It is also desirable that the above-mentioned semiconductor substratehas a guard ring formed around the components. Thus, it is possible tofurther effectively prevent the noise generated in a circuit on theN-well from sneaking on another component through the semiconductorsubstrate.

It is also desirable that the above-mentioned guard ring is formed at aposition deeper than the N-well from the semiconductor substrate'ssurface. It is possible, by forming the guard ring at the deeperposition, to eliminate the 1/f noise in a low-frequency area sneakingbeyond the guard ring.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a diagram showing a configuration of an FM receiver accordingto the embodiment;

FIG. 2 is a diagram showing a noise characteristic of the FETmanufactured by using the CMOS process or the MOS process;

FIG. 3 is a diagram showing an overview of multi-connected amplificationelements;

FIG. 4 is a diagram showing the gate width W and the gate length L ofthe FET;

FIG. 5 is a plan view showing an overview configuration in the case offorming the components on the N-well; and

FIG. 6 is a sectional view of the configuration shown in FIG. 5.

BEST MODE FOR CARRYING OUT THE INVENTION

Hereafter, a receiver according to an embodiment of the presentinvention will be described in detail.

FIG. 1 is a diagram showing a configuration of an FM receiver accordingto the embodiment. The FM receiver shown in FIG. 1 is comprised of ahigh-frequency amplifier circuit 11, a mixing circuit 12, a localoscillator 13, an intermediate-frequency filters 14, 16, anintermediate-frequency amplifier circuit 15, a limit circuit 17, an FMdetection circuit 18 and a stereo demodulation circuit 19 which areformed a one-chip component 10.

After amplifying an FM modulated wave signal received by an antenna 20with the high-frequency amplifier circuit 11, a high-frequency signal isconverted into an intermediate-frequency signal by mixing it with alocal oscillation signal outputted from the local oscillator 13. Forinstance, if a carrier frequency of the modulated wave signal outputtedfrom the high-frequency amplifier circuit 11 is f1 and the frequency ofthe local oscillation signal outputted from the local oscillator 13 isf2, an intermediate-frequency signal having the frequency of f1−f2 isoutputted from the mixing circuit 12.

The intermediate-frequency filters 14 and 16 are provided to a precedingstage and a subsequent stage to the intermediate-frequency amplifiercircuit 15, and extract only a predetermined band component from aninputted intermediate-frequency signal. The intermediate-frequencyamplifier circuit 15 amplifies some intermediate-frequency signalspassing through the intermediate-frequency filters 14 and 16.

The limit circuit 17 amplifies the inputted intermediate-frequencysignal with a high gain. The FM detection circuit 18 performs FMdetection to a signal of fixed amplitude from the limit circuit 17. Thestereo demodulation circuit 19 performs stereo demodulation to acomposite signal after the FM detection outputted from the FM detectioncircuit 18 so as to generate an L signal and an R signal.

The above-mentioned one-chip component 10 of this embodiment isintegrally formed on the semiconductor substrate by using CMOS processor MOS process. This semiconductor substrate has the circuitsconstituting the one-chip component 10 shown in FIG. 1 formed thereon,and also has various analog and digital circuits formed thereon. It iseasy to form various CMOS components by using the CMOS process or theMOS process. Therefore, it is desirable, for instance, to have afrequency synthesizer for varying an oscillation frequency of the localoscillator 13 to set a receiving frequency, a display and a controlcircuit thereof formed on the same semiconductor substrate.

Incidentally, the FET formed by using the CMOS process or the MOSprocess is generally characterized by having significant 1/f noise whichis low-frequency noise compared to a bipolar transistor. Therefore, ifthe one-chip component 10 shown in FIG. 1 is formed on one chip by usingthe CMOS process or the MOS process, the FET as an amplification elementincluded therein becomes a source of the 1/f noise. Furthermore, in thecase of converting a modulated wave signal of a high frequency into anintermediate-frequency signal of a low frequency by using the mixingcircuit 12, the ratio of the 1/f noise component in theintermediate-frequency signal becomes higher, resulting in deteriorationof receiving quality due to decline in an SN ratio.

For this reason, the one-chip component 10 constituting the receiveraccording to this embodiment uses p-channel type FETs as theamplification elements included in the mixing circuit 12, anintermediate-frequency filters 14, 16, an intermediate-frequencyamplifier circuit 15 and local oscillator 13.

FIG. 2 is a diagram showing a noise characteristic of the FETmanufactured by using the CMOS process or the MOS process. Thehorizontal axis indicates the frequency, and the vertical axis indicatesthe noise level respectively. The characteristic indicated in full lineshows the noise characteristic of the p-channel type FET, and thecharacteristic indicated in dotted line shows the noise characteristicof the n-channel type FET. As shown in FIG. 2, the p-channel type FEThas less 1/f noise appearing in a low-frequency area than the n-channeltype FET. It is supposedly because the p-channel type FET has lessmobility.

Therefore, the 1/f noise itself can be reduced by using the p-channeltype FETs as the amplification elements. Thus, it is possible to reducegeneration of the low-frequency noise in the one-chip component 10 so asto improve the SN ratio and signal quality of the entire receiver.

In consideration of the circuits from the mixing circuit 12 to theintermediate-frequency filter 16 in the subsequent stage (or to thelimit circuit 17) included in the above-mentioned one-chip component 10,it is thinkable, by paying attention to the amplification elements ofwhich amplification factor is one or more included in these circuits,that a plurality of stages of amplification elements are equivalentlymulti-connected.

FIG. 3 is a diagram showing an overview of multi-connected amplificationelements. As shown in FIG. 3, n stages of amplification elements 30-1,30-2, . . . , 30-n are multi-connected. As described above, theamplification elements 30-1 and so on are comprised of the p-channeltype FETs.

Incidentally, a noise voltage V_(n) generated by the MOS-type FET can berepresented in general as follows.V_(n)={square root}{square root over ( )}((8kT(1+η)/(3g _(m))+KF/(2fCoxWLK′))Δf)Here, reference symbol k denotes a Boltzmann's constant, T denotes anabsolute temperature, g_(m) denotes mutual conductance, Cox denotes acapacity between a gate and a channel sandwiching a gate oxide film, Wdenotes the gate width, L denotes the gate length, f denotes thefrequency, and Δf denotes a bandwidth of the frequency f. KF denotes anoise parameter which is a value between 10⁻²⁰ to 10⁻²⁵ or so. And η andK′ are predetermined parameters.

In this formula, it is understandable that the second term on the rightside denotes the 1/f noise, which is in proportion to the reciprocal off, that is, the lower the frequency f becomes, the more significant the1/f noise becomes.

It is also understandable from this formula that the 1/f noise is alsoin proportion to the reciprocal of the gate width W and the reciprocalof the gate length L. FIG. 4 is a diagram showing the gate width W andthe gate length L of the FET, where a plan view showing the entire FETformed in the proximity of the semiconductor substrate's surface isshown.

Therefore, it is understandable that the 1/f noise can also be reducedby setting the gate width W and the gate length L at large values. Ifthe gate width W and the gate length L are set at large values as to allthe FETs, however, the area occupied by each FET becomes larger andleads to increase in chip area. For this reason, it is desirable to setthe gate width W and the gate length L at predetermined values only forthe FETs to which the reduction in the 1/f noise is very effective.

In particular, considering the case of multi-connecting theamplification elements 30-1 and so on comprised of the FETs, the 1/fnoise generated in the amplification element included in the precedingstage is amplified in the amplification element placed in the subsequentstage thereto. Therefore, it is desirable to reduce the 1/f noisegenerated in the amplification elements included in the preceding stagesfor the sake of reducing overall low-frequency noise. The 1/f noisegenerated in the subsequent stages is amplified to a lesser extent infurther subsequent stages thereto, and so it supposedly contributeslittle to reduction in the overall low-frequency noise. Therefore, it ispossible, by setting the gate length L and gate width W of the FETsconstituting the amplification elements included in the subsequentstages at values smaller than those of the FETs in preceding stagesthereto, to reduce the area required by the FETs so as to reduce thecost by miniaturization of the chips.

Otherwise, it is also desirable, by paying attention to the FETsconstituting the amplification elements at the arbitrary positions shownin FIG. 3, to set the gate length L and gate width W of the FETconstituting each amplification element so that the noise componentgenerated by the FET becomes smaller than that included in the inputsignal of the FET. It is possible, by rendering the noise componentgenerated by the FET constituting any of the amplification elementssmaller than that in the input signal of that FET, to reduce the overalllow-frequency noise.

The present invention is not limited to the above embodiment, butvarious modified embodiments are possible within the gist thereof. Forinstance, the above embodiment described the FM receiver. However, thepresent invention is also applicable to various receivers such as an AMreceiver and a data terminal device, transmitters or communicationdevices. The present invention is also applicable, for the sake ofperforming orthogonal demodulation, to the receiver and so on having twomixing circuits, one local oscillator and one phase shifter.

The above embodiment does not especially refer to a relationship betweenthe frequency of the local oscillation signal and a carrier frequency ofthe modulated wave signal. In the case where a difference between thesefrequencies is smaller than the occupied frequency bandwidth of themodulated wave signal, however, an area close to a DC component is usedas a signal band in the intermediate-frequency signal outputted from themixing circuit 12 so that the influence of the 1/f noise becomes mostsignificant. Therefore, it is possible to render the noise reductionmost effective by applying the present invention to the receiver havingsuch a setup.

According to the above embodiment, in the case of integrally forming thecomponents including at least the mixing circuit 12,intermediate-frequency amplifier circuit 15, intermediate-frequencyfilters 14, 16 and local oscillator 13 on the semiconductor substrate,it is possible, by forming these components on the N-well, to preventthe noise from sneaking on another circuit from these components throughthe semiconductor substrate.

FIG. 5 is a plan view showing an overview configuration in the case offorming the components on the N-well. FIG. 6 is a sectional view of theconfiguration shown in FIG. 5. As for the configuration shown in FIG. 5,it is the case where the multi-connected amplification elements includedin a component 40 including at least the mixing circuit 12,intermediate-frequency amplifier circuit 15, intermediate-frequencyfilters 14, 16 and local oscillator 13 are constituted by using thep-channel type FETs, and the component 40 is formed on an N-well 52.

A PN joint surface is formed between the N-well 52 and a P-typesemiconductor substrate 50. Therefore, in the case where an electricalpotential of the N-well 52 is higher than that of the semiconductorsubstrate 50, the current running from the N-well 52 to thesemiconductor substrate 50 is interrupted by the PN joint surface. Forthis reason, it is possible to prevent the noise generated in thecomponent 40 formed on the N-well 52 from sneaking on another circuitthrough the semiconductor substrate 50.

As shown in FIG. 6, a guard ring 54 is formed in an adjacent areasurrounding the N-well 52 close to the surface of the semiconductorsubstrate 50. The guard ring 54 is a part of the P-type semiconductorsubstrate 50 formed as an N-type area. As a PNP layer is formed by theguard ring 54 and the semiconductor substrate 50, it is possible toprevent the noise generated in the component 40 formed on the N-well 52from sneaking on another circuit through a portion close to the surfaceof the semiconductor substrate 50.

In particular, it is desirable that the guard ring 54 is formed to reacha deeper area of the semiconductor substrate 50, that is, a point deeperthan the N-well 52 for instance. Thus, it becomes possible to prevent alower-frequency component from sneaking in the case where the noisegenerated in the component 40 formed on the N-well 52 sneaks on anothercircuit through an underside (inside of the semiconductor substrate 50)of the guard ring 54.

Industrial Applicability

As described above, it is possible, according to the present invention,to reduce the 1/f noise itself by using the p-channel type FETs of whichmobility is low as the amplification elements so that, even in the casewhere at least the mixing circuit, intermediate-frequency amplifiercircuit, intermediate-frequency filters and local oscillator areintegrally formed on the semiconductor substrate by using the CMOSprocess or the MOS process, the low-frequency noise generated thereincan be reduced.

1. A receiver having a high-frequency amplifier circuit for amplifying amodulated wave signal received via an antenna, a local oscillator forgenerating a predetermined local oscillation signal, a mixing circuitfor mixing and outputting the modulated wave signal amplified by saidhigh-frequency amplifier circuit and the local oscillation signaloutputted from said local oscillator, an intermediate-frequencyamplifier circuit for amplifying an intermediate-frequency signaloutputted from said mixing circuit, and an intermediate-frequency filterfor selectively outputting said intermediate-frequency signals,characterized in that at least said mixing circuit, saidintermediate-frequency amplifier circuit, said intermediate-frequencyfilter and said local oscillator are integrally formed on asemiconductor substrate by using CMOS process or MOS process, andamplification elements included therein are formed by using a p-channeltype FET.
 2. The receiver according to claim 1, characterized in thatsaid intermediate-frequency filter extracts a difference componentbetween said modulated wave signal and said local oscillation signal assaid intermediate-frequency signal.
 3. The receiver according to claim1, characterized in that a difference between a frequency of said localoscillation signal and a carrier frequency of said modulated wave signalis smaller than an occupied frequency bandwidth of said modulated wavesignal.
 4. The receiver according to claim 1, characterized in that saidmixing circuit, said intermediate-frequency amplifier circuit and saidintermediate-frequency filter are cascade-connected, and when payingattention to said FETs multi-connected as said amplification elementsincluded therein, a gate length L and a gate width W of said FETs placedin preceding stages are set at values larger than the gate length L andgate width W of said FETs placed in subsequent stages thereto.
 5. Thereceiver according to claim 1, characterized in that said mixingcircuit, said intermediate-frequency amplifier circuit and saidintermediate-frequency filter are cascade-connected, and when payingattention to said FETs multi-connected at arbitrary positions as saidamplification elements included therein, the gate length L and gatewidth W of each of said FETs are set so that the noise componentgenerated by the FET becomes smaller than that included in an inputsignal.
 6. The receiver according to claim 1, characterized in that saidsemiconductor substrate has an N-well formed thereon, and the componentsincluding at least said mixing circuit, said intermediate-frequencyamplifier circuit, said intermediate-frequency filter and said localoscillator are formed on the N-well.
 7. The receiver according to claim6, characterized in that said semiconductor substrate has a guard ringformed around said components.
 8. The receiver according to claim 7,characterized in that said guard ring is formed to a position deeperthan said N-well from said semiconductor substrate's surface.